Computing Frontiers 2005

Conference Program

MAY-3 (tuesday)

18:00 - 19:00 Conference registration
19:00 Welcome reception

MAY-4 (wednesday)

9:00-10:00 Keynote: James E. Smith. U. of Winsconsin-Madison
Virtual Machines: Supporting Changing Technology and New Applications
10:00-11:00 Track 6: Autonomic and Organic computing Track 5: Supercomputing (part 1)
Marching-Pixels: A new organic computing paradigm for smart sensor processor arrays. Dietmar Fey, Daniel Schmidt. University Jena. Balancing Clustering-Induced Stalls to Improve Performance in Clustered Processors. Amirali Baniasadi. University of Victoria.
First steps towards Organic Computing Systems ¿ Monitoring an adaptive protocol stack with a fuzzy classifier system. Thorsten Schöler, Christian Müller-Schloer. SRA, Uni Hannover. Eldorado. John Feo, David Harper, Simon Kahan, Petr Konecny. Cray Inc.
11:00-11:20 Coffee break
11:20-12:50 Track 1: Non-conventional computing
Reversible computing : from mathematical group theory to electronical circuit experiment. Alexis De Vos and Yvan Van Rentergem. Universiteit Gent.
Two-state, Reversible, Universal Cellular Automata in Three Dimensions. Daniel B. Miller and Edward Fredkin. Carnegie Mellon University.
Specific ergodicity: An informative indicator for invertible computational media. Tommaso Toffoli and Lev B. Levitin. Boston University.
12:50-14:00 Lunch
14:00-15:00 NSF and EU Funding (Discussion panel)
15:00-16:00 Track 2: Grid computing (part 1) Track 4: Reconfigurable computing (part 1)
Jalapeno - Decentralized Grid Computing using Peer-to-Peer Technology. Niklas Therning and Lars Bengtsson. Chalmers University of Technology - Department of Computer Engineering. Reconfigurable Universal SAD-Multiplier Array. Humberto Calderon and Stamatis Vassiliadis. TU Delft.
A Distributed Utility-based Two Level Market Solution For Optimal Resource Allocation In Computational Grid. Li Chunlin. wuhan university of technology. Evaluation of Extended Dictionary-Based Static Code Compression Schemes. Martin Thuresson and Per Stenstrom. Chalmers University of Technology.
16:00 - 16:20 Coffee break
16:20-17:20 Track 2: Grid computing (part 2) Track 4: Reconfigurable computing (part 2)
Grid Result Checking. Cecile Germain-Renaud, Dephine Monnier-Ragaigne, CNRS and Paris-Sud University. Dynamic Loop Pipelining in Data-Driven Architectures. João M. P. Cardoso. University of Algarve.
GRID Based Federated Digital Library. Kurt Maly, Mohammad Zubair , V. Chilukumari, Pratik Kothari. ODU. Owl: Next Generation System Monitoring. Martin Schulz, Brian White, Sally A McKee, Hsien-Hsin Lee, Juergen Jeitner. Lawrence Livermore National Lab, Cornell University, Georgia Institute of Technology, and Technische Universitaat Muenchen.

MAY-5 (thursday)

9:00-10:00 Invited talk: Valentina Salapura. IBM.
Power and performance optimization at the system level.
10:00-11:00 Track 14: Quantum computing
Improving Quantum Circuit Dependability with Reconfigurable Quantum Gate Arrays. Mihai Udrescu, Lucian Prodan, Mircea Vladutiu. ACSA (Advanced Computing Systems and Architectures) Laboratory, Politehnica University, Romania.
Using a hybrid CA based model for a flexoble qualitative qubit simulation: fully fristrated Josephson Junction Ladder (JJL) application. C. R. Calidonna, Istituto di Cibernetica C.N.R "Eduardo Caianiello", and A. Naddeo, Dipartimento di. Scienze Fisiche Universite di Napoli "Federico II" and Coherentia-INFM, Unit di Napoli.
11:00-11:20 Coffee break
11:20-12:50 Track 3: High performance embedded architectures (part 1)
Skewed Caches from a Low-Power Perspective. Mathias Spjuth, Martin Karlsson and Erik Hagersten. Uppsala University.
Controlling Leakage Power with the Replacement Policy in Slumberous Caches. Nasir Mohyuddin, Rashed Bhatti and Michel Dubois. USC.
Matrix Register File and Extended Subwords: Two Techniques for Embedded Media Processors. Asadollah Shahbahrami, and Ben Juurlink, and Stamatis Vassiliadis. Computer Engineering Laboratory, Delft University of Technology.
12:50-14:00 Lunch
14:00-16:00 Track 7: Compilers and Operating Systems
Optimizing General Purpose Compiler Optimization. M. Haneda and P.M.W. Knijnenburg and H.A.G. Wijshoff. LIACS, Leiden University.
Transition Aware Scheduling:Increasing Continous Idle-periods in Resource Units. K. Ananda Vardhan, Y. N. Srikant.
Scheduling for Heterogeneous Processors in Server Systems. Soraya Ghiasi, Tom Keller and Freeman Rawson. IBM Austin Research Lab.
Dynamic Run-time Architecture Techniques for Enabling Continuous Optimization. Tipp Moseley, Dirk Grunwald, Alex Shye, Vijay Janapa Reddi, Matthew Iyer, Dan Fay, David Hodgdon, Joshua L. Kihm, Alex Settle, Daniel A. Connors. University of Colorado.
16:00-16:20 Coffee break
16:20 - 17:20 Track 10: Workload characterization of emerging applications
A QoS-enabled Packet Scheduling Algorithm for IPSec Multi-Accelerator Based Systems. Alberto Ferrante, Vincenzo Piuri, Department of Information Technologies - University of Milan, Fabien Castanier, Advanced System Technology - ST Microelectronics.
Sparse Matrix Storage Revisited. Malik Silva, Richard Wait. University of Colombo School of Computing.
20:00Conference Banquet

MAY-6 (friday)

9:00-10:00 Track 8: Pervasive computing Track 5: Supercomputing (part 2)
Contextual Knowledge Management in Peer to Peer Computing - Applications to Mobile-Multiplayer Games. V.K.Murthy, School of Business Information Technology RMIT University, and E.V.Krishnamurthy, Computer Sciences Laboratory Australian National University. A Case for a Working-set-based Memory Hierarchy. Steve Carr and Soner Onder. Michigan Technological University.
Communication and Security Extensions for a Ubiquitous Mobile Agent System (UbiMAS). F. Bagci, H. Schick, J. Petzold, W. Trumler, and T. Ungerer. University of Augsburg. Exploiting Processor Groups to Extend Scalability of the GA Shared Memory Programming Model. J. Nieplocha, M. Krishnan, B. Palmer, Y. Zhang. Pacific Northwest National Laboratory.
10:00-11:00 Track 13: Special purpose architectures
A Computing Architecture for Physics. Edward Fredkin. Carnegie Mellon University.
A combined hardware and software architecture for secure computing. Jörg Platte and Edwin Naroska. University of Dortmund.
11:00 - 11:20 Coffee break
11:20 - 12:50 Track 3: High performance embedded architectures (part 2)
Reducing Misspeculation Overhead for Module-level Speculative Execution. Fredrik Warg and Per Stenstrom. Chalmers University of Technology.
Partially Ordered Epochs for Thread-Level Speculation. Braxton Thomason and Craig Chase. Braxton Thomason and Craig Chase. University of Texas at Austin.
A Time-Predictable Execution Mode for High-Performance Processors. Christine Rochange, IRIT (Institut de Recherche en Informatique de Toulouse), Pascal Sainrat, HiPEAC Network (European Network of Excellence on High-Performance Embedded Architecture and Compilation) and IRIT (Institut de Recherche en Informatique de Toulouse)
12:50-14:00 Lunch
14:00-16:00 Track 15: Open topics Track 12: Temperature, energy, and complexity-aware designs
SPANIDS: A Scalable Network Intrusion Detection Loadbalancer. Lambert Schaelicke, Kyle Wheeler, and Curt Freeland. Department of Computer Science and Engineering University of Notre Dame. An Efficient Wakeup Design for Energy Reduction in High-Performance Superscalar Processors. Kuo-Su Hsiao and Chung-Ho Chen. EE, NCKU, TW.
Reliability Assessment in Embryonics Inspired by Fault-Tolerant Quantum Computation. Lucian Prodan, Mihai Udrescu, Mircea Vladutiu. ACSA (Advanced Computing Systems and Architectures) Laboratory, Politehnica University, Romania. On the Energy-Efficiency of Speculative Hardware. Nana B. Sam, Martin Burtscher. Computer Systems Lab, Cornell University.
Improve Branch Prediction Accuracy with Parallel Conservative Correctors. Chunrong Lai, Shih-Lien Lu, Yurong Chen. Intel China Research Center. Exploiting Temporal Locality in Drowsy Cache Policies. Salvador Petit, Julio Sahuquillo, José M. Such, and David Kaeli. Universidad Politecnica de Valencia, and Northeastern University.
When Prefetching Improves/Degrades Performance. Thomas R. Puzak, A. Hartstein, Philip G. Emma, and Viji Srinivasan IBM T.J. Watson Research Center. Drowsy Region Based Caches: Minimizing Both Dynamic and Static Power Dissipation. Michael J. Geiger, Electrical Engineering and Computer Science University of Michigan, Gary S. Tyson, Department of Computer Science Florida State University, Sally A. McKee, Computer Systems Lab Cornell University.
16:00-16:20 Coffee break
16:20-16:30 Closing remarks