ACM International Conference on
Computing Frontiers
Ischia, Italy
May 2-5, 2006

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Tutorial 2
May 2, 2006
2:00pm - 5:00pm
Hardware and software architecture of the BlueGene/L supercomputer
Jose Moreira, IBM Systems and Technology Group, Rochester MN, US
Valentina Salapura, IBM T.J. Watson Research Center, Yorktown Heights NY, US

The BlueGene/L supercomputer has been designed with a focus on power/performance efficiency to achieve high application performance under the thermal constraints of common data centers. To achieve this goal, emphasis was put on system solutions to engineer a power-efficient system. To exploit thread level parallelism, the BlueGene/L system can scale to 64 racks with a total of 65536 computer nodes consisting of a single compute ASIC integrating all system functions with two industry-standard PowerPC microprocessor cores in a chip multiprocessor configuration, totaling 131072 processor cores. Each PowerPC processor exploits data-level parallelism with a high-performance SIMD floating point unit.

To ensure optimal system operation, BlueGene/L is an integrated solution combining innovative system software, tools, architecture, system design, and packaging at all levels. A high-performance software stack consisting of operating system services, compilers, high-performance computing libraries and middleware complete an integrated solution designed with a holistic design approach. In this tutorial, we will discuss both hardware and software design tradeoffs for the BlueGene/L system.

To support good application scaling on such a massive system, special emphasis was put on efficient communication primitives by including five highly optimized communication networks. After an initial introduction of the BlueGene/L system architecture, we analyze power/performance efficiency for the BlueGene/L system using performance and power characteristics for the overall system performance (as exemplified by peak performance numbers).

Biographies: Jose E. Moreira received B.S. degrees in physics and electrical engineering in 1987 and an M.S. degree in electrical engineering in 1990, all from the University of Sao Paulo, Brazil. He received his Ph.D. degree inelectrical engineering from the University of Illinois at Urbana-Champaign in 1995. Since joining IBM in 1995, he has been involved in several high-performance computing projects, including the Teraflop-scale ASCI Blue-Pacific, ASCI White, and Blue Gene/L. Dr. Moreira was a manager at the IBM Thomas J. Watson Research Center from 2001 to 2004 and he is currently the Software Systems Architect for the IBM e-server Blue Gene solution. Dr. Moreira is the author of over 70 publications on high- performance computing. He has served in various thesis committees and has been the chair or vice-chair of several international conferences and workshops. Dr. Moreira is responsible for defining the technical characteristics of the IBM e-server Blue Gene solution, which started shipping to customers in the last quarter of 2004. Over 500 Teraflops of Blue Gene/L computing capacity have been installed at multiple sites in the US, Europe, and Japan. In his job, Dr. Moreira interacts closely with software developers, hardware developers, system installers, and customers to guarantee that the delivered systems work effectively and accomplish their intended missions successfully.

Dr. Valentina Salapura is a Research Staff Member with the IBM T.J. Watson Research Center. Dr. Salapura has been a technical leader for the Blue Gene program since its inception. She has contributed to the architecture and implementation of three generations of Blue Gene Systems focusing on multiprocessor interconnect and synchronization and multithreaded architecture design and evaluation. Dr. Salapura has been a leader in the definition and evaluation of the BlueGene architecture value proposition, Before joining IBM, Dr. Salapura was Assistant Professor with the Dept of Computer Engineering at Technische Universitat Wien, where she was a leading contributor to the architecture and implementation of the TTA time-triggered architecture and configurable microprocessor architectures. Dr. Salapura is the author of over 50 papers on processor architectures and high-performance computing, and holds many patents in this area. Dr. Salapura has served on the program committees of several international conferences and workshops, and is General Chair for Computing Frontiers 2006. She received the Ph.D. degree from Technische Universitat Wien in 1996, and MS degrees in Electrical Engineering and Computer Science.