Sunday, May 17 |
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19:00- 20:00 |
Registration | |||||||||
Monday, May 18 |
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08:00 | Registration | |||||||||
09:00 | Welcome and Opening Remarks by General Chair and Program Co-Chairs | |||||||||
09:30 | Keynote 1 Larrabee: A Many-Core Intel(r) Architecture for Visual Computing Roger Espasa, Intel Corporation Chair: G. Gaydadjiev |
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10:30 | Coffee break | |||||||||
Session I (Innovative Memory Systems) Chair: S. McKee |
DaGreS'09 Workshop Co-Chairs: G. Aloisio, and S. Fiore, CMCC & University of Salento, Italy |
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11:00 | A Light-Weight Fairness Mechanism for Chip Multiprocessor Memory Systems M. Jahre, L. Natvig |
Data grids for conservation of cultural inheritance R. Barberal, A. Calanducci, A. De Filippo, F. De Mattia, S, Iannizzotto, M. Saso, J. Sevilla, D. Vicinanza |
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11:30 | A study of conflicting data in TM programs and methods to increasing
concurrency using Value Prediction S. Pant, G. Byrd |
Replicated Data Management in the Grid: The Re:GRIDiT Approach L. Voicu, H. Schuldt, Y. Breitbart, H.-J. Schek |
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12:00 | Space-and-Time Efficient Garbage Collectors for Parallel Systems S. Liu, L. Wang, X. Li, J. Gaudiot |
Challenges on preserving scientific data with data grids J. Barateiro, G. Antunes, F. Freitas, J. Borbinha |
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12:30 | Lunch break | |||||||||
Session II (Advanced Architectures 1) Chair: G. Byrd |
DaGreS'09 | |||||||||
14:00 | Core Monitors: Monitoring Performance in Multicore Processors P. West, Y. Peress, D. Tyson, S. McKee |
Synchronization and Caching Data for Linear Algebra Algorithms
in Distributed and Grid Computing Environments G. Laccetti, M. Lapegna, D. Romano, V. Mele |
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14:30 | A Study on Optimally Co-scheduling Jobs of Different Lengths on Chip
Multiprocessors K. Tian, Y. Jiang, X. Shen |
Methods of linear transfer speed Estimation in the Data Grid M. Panshenskov, A. Vakhitov |
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15:00 | A Multi-streaming SIMD Architecture for Multimedia Applications J. Chiu, Y. Chou, H. Tzeng, C. Shen |
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15:30 | Coffee break | |||||||||
Session III (HPC Applications) Chair: P Kelly |
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16:00 | Quantitative Analysis of Sequence Alignment Applications on Multiprocessor
Architectures F. Castaño, A. Ramirez, M. Valero |
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16:30 | Mapping the LU Decomposition on a Many-Core Architecture: Challenges and
Solutions I. Venetis, G. Gao |
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17:00 | New Applications of Quantum Algorithms to Computer Graphics: the Quantum
Random Sample Consensus Algorithm S. Caraiman, V. Manta |
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17:30 | End of Sessions | |||||||||
19:30 | Welcome Reception | |||||||||
Tuesday, May 19 |
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09:00 | Registration | |||||||||
09:30 | Keynote 2 Pervasive Massively Multithreaded GPU Processors Michael C. Shebanow, NVIDIA Corporation Chair: C. Di Napoli |
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10:30 | Coffee break | |||||||||
Session IV (Novel Tools and Methods 1) Chair: A. J Smith |
CompBio'09 Workshop Co-Chairs: R. Casadio, and L. Margara,University of Bologna, Italy |
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11:00 | Towards Automatic Program Partitioning S. Rul, H. Vandierendonck, K. Bosschere |
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11:30 | Non-clairvoyant Speed Scaling for Batched Parallel Jobs on Multiprocessors H. Sun, Y. Cao, W. Hsu |
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12:00 | Pleiad:A Cross-Environment Middleware Providing Efficient Multithreading on
Clusters K. Karantasis, E. Polychronopoulos |
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12:30 | Lunch break | |||||||||
Session V (Innovative Acceleration platforms) Chair: C Trinitis |
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14:00 | Data Parallel Acceleration of Decision Support Queries Using Cell/BE and GPUs P. Trancoso, D. Othonos, A. Artemiou |
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14:30 | Efficient Wave Field Synthesis for 3D Audio: architectural prospectives D. Theodoropoulos, C. Ciobanu, G. Kuzmanov |
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15:00 | Accelerating Total Variation Regularization for Matrix-Valued Images on GPUs M. Moazeni, A. Bui, M. Sarrafzadeh |
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15:30 | A Control-structure Splitting Optimization for GPGPU S. CARRILLO, J. Siegel, X. Li |
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15:50 | Coffee break | |||||||||
Session VI (Advanced Architectures 2) Chair: P Trancoso |
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16:15 | Improving Performance of Simple Cores by Exploiting Loop-Level Parallelism
through Value Prediction and Reconfiguration T. Suri, A. Aggarwal |
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16:45 | Scheduling Dynamic Parallelism on Accelators F. Blagojevic, C. Iancu, K. Yelick, D. Nikolopoulos, B. Rose, M. Curtis-Maury |
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17:15 | Power Consumption and Reduction in a Real, Commercial Multimedia Core D. Antonelli, A.J. Smith, J.-W. van de Waerdt |
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17:35 | End of Sessions | |||||||||
20:00 | Social Dinner | |||||||||
Wednesday, May 20 |
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09:00 | Registration | |||||||||
09:30 | Panel:Compiler Technologies for Current and Future Computer Systems Organized by: Almadena Chtchelkanova and Alex Nicolau Participants: Keshav Pingali (UT Austin) Gianfranco Bilardi (U of Padua) Barbara Chapman (U of Houston) Albert Cohen (INRIA) |
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10:40 | Coffee break | |||||||||
Session VII (Novel Tools and Methods 2) Chair: A. Cohen |
UCHPC'09 & MAW'09 UCHPC Organizer: A. Hast, University of Gävle, Sweden MAW Organizer: J. Weidendorfer, Technische Universität München, Germany |
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11:10 | High-Performance SIMT Code Generation in an Active Visual Effects Library J. Cornwall, P. Kelly, P. Parsonage, B. Nicoletti |
Clustering Billions Data Points Using GPU R. Wu, B. Zhang, M. Hsu |
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11:40 | True Value: Assessing and Optimizing the Cost of Computing at the Data Center
Level J. Moreira, J. Karidis, J. Moreno |
An Intelligent Semi-Automatic Application Porting System for Application Accelerators T. Beach |
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12:10 | High Accuracy Failure Injection in Parallel and Distributed Systems Emulation T. Hérault, T. Largillier, S. Peyronnet, B. Quétier, F. Cappello, M. Jan |
Accelerating PQMRCGSTAB Algorithm on GPU J. Chen |
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12:30 | Lunch break | |||||||||
Session VIII (Advanced Computing Systems Management and
Evaluation) Chair: J Moreira |
UCHPC'09 & MAW'09 | |||||||||
14:00 | Scalable Transparent Checkpoint-Restart of Global Address Space Applications
on Virtual Machines over Infiniband O. Villa, S. Krishnamoorth, J. Nieplocha, D. Brown |
Can Cloud Computing Reach The TOP500? P. Bientinesi |
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14:30 | Evaluating Three Multi-Core Processors for HPC Data-Intensive Kernels A. van Amesfoort, A. Varbanescu, R. van Nieuwpoort, H. Sips |
Towards Many-Core Implementations of Matrix Matrix Multiplication and LU Decomposition using Peano Curves A. Heinecke, M. Bader |
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15:00 | Strategies for Dynamic Memory Allocation in Hybrid Architectures P. Bertels, W. Heirman, D. Stroobandt |
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15:20 | Characterizing the Performance Penalties Induced by Irregular Code using
Pointer Structures and Indirection Arrays on the Intel Core 2 Architecture H. Spek, E. Bakker, H. Wijshoff |
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15:40 | Coffee break | |||||||||
16:00 | Closing Remarks | |||||||||
16:30 | Conference Adjourns | |||||||||