Special Session: A Snapshot into the Future, New FP7 Computing Systems Projects
In the era of the multi- and many-core, new challenges such as power appear in tandem with new opportunities such as heterogeneous and reconfigurable computing. The solutions for this new era should be scalable from embedded systems all the way to high-performance computing platforms. Nanoscale manufacturing processes increase the relevance of reliability and availability while the future appearance of tens to hundreds of cores on chip are creating new research horizons for programmability i.e. on how to extract the full potential of the hardware.
European Commission has highlighted the above issues in its first call for the Seventh Framework Programme under the Computing Systems topic. We will devote a special session to the projects accepted for this call. This will be the first time when all of the projects will appear together in a public forum with a global relevance. We hope that this will be an opportunity that will provide a detailed exposure into the future of research in the EU in Computing Systems.
The special session will take place on May 6th; please find the program below.
11:00
11:25
Opening Remarks: European Research in Computing
Panagiotis Tsarchopoulos
11:25
11:50
HIPEAC: High Performance and Embedded Architecture and Compilation (NOE)
Koen De Bosschere
11:50
12:15
Apple-Core: Architecture Paradigms and Programming Languages for Efficient programming of multiple CORES (STREP)
Chris Jesshope
12:15
12:40
CRISP: Cutting edge Reconfigurable ICs for Stream Processing (STREP)
Paul Heysters
12:40
14:00
Lunch Break
14:00
14:25
GENESYS: Generic Embedded System Platform (STREP)
Christian El Salloum
14:25
14:50
ICT-eMuCo: Embedded Multi-Core Processing for Mobile Communication Systems (STREP)
Attila Bilgic
14:50
15:45
JEOPARD: Java Environment for Parallel Realtime Development (STREP)
James J. Hunt
15:15
15:45
Coffee Break
15:45
16:10
MERASA: Multicore Execution of Hard Real-Time Applications (STREP)
Theo Ungerer
16:10
16:35
MOSART: Mapping optimisation for Scalable multi-core Architecture, the Cognitive Radio case study (STREP)
Bernard Candaele
16:35
17:00
VELOX: An Integrated Approach to Transactional Memory on Multi- and Many-core Computers (STREP)
Osman Unsal
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