Key Dates

Submissions Deadline

January 29, 2016
January 15, 2016

Author Notification

March 11, 2016

Camera-Ready Papers Due

March 25, 2016


Submission

Submit your paper here


Download CFP

TXT Format PDF Format


Previous Conferences

2015, 2014, 2013, 2012, 2011, 2010, 2009, 2008, 2007, 2006, 2005, 2004


General Co-Chairs

Gianluca Palermo
Politecnico di Milano, IT
John Feo
PNNL/NIAC, US

Program Co-Chairs

Antonino Tumeo
PNNL, US
Hubertus Franke
New York University /IBM Research, US




For more information, visit the website at www.computingfrontiers.org

Program Overview

Monday
May 16
Tuesday
May 17th
Wednesday
May 18
08:30 08:30-08:45
Conference
Opening
08:45 08:45-09:45
Keynote 1
08:45-09:45
Keynote 2
09:00 09:00-10:40
Architectural
Optimizations
09:55 09:55-10:45
Panel 1
09:55-10:45
Panel 2
10:40 (break)
10:45 (break) (break)
11:15 11:15-12:55
Accelerating Graph
Algorithms
11:15-12:55
Compiler approaches
11:15-12:55
Design Space
Exploration
12:55 (lunch) (lunch) (lunch)
14:00 14:00-15:15
Resiliency and
Variability
14:00-15:15
Emerging approaches
14:00-15:20
Special Session 1
Funded International
Projects
14:00-15:15
Emerging
Architectures
15:15 (break) (break)
15:20 (break)
15:45 15:45-16:35
Scaling Graph
Algorithms
15:45-17:25
Runtime approaches
15:45-17:30
Special Session 2
Funded International
Projects
16:35 16:35-17:25
Poster
Flash Talks
17:30 17:30-19:00
Poster Session and
Cocktail Reception
17:30-19:30
Guided walking tour of Como
19:45 19:45
Conference Banquet

Detailed Schedule

Monday May 16

    08:30-08:45 Conference Opening

    08:45-09:45 Keynote 1
    Chair: Antonino Tumeo
    Sub-PicoJoule per Operation scalable computing - Why, When, How?
    Luca Benini (ETH Zurich) (abstract/bio)

    09:55-10:45 Panel 1
    Chair: John Feo
    Quantum Computing: Truth or Lie?
    Panelists: Edoardo Charbon, Koen Bertels, Satoshi Matsuoka, Francesco Regazzoni

    10:45-11:15 (break)

    11:15-12:55 Session Accelerating Graph Algorithms
    Chair: Kubilay Atasu
    11:15-11:40 Breadth First Search Vectorization on the Intel Xeon Phi
    Mireya Paredes, Graham Riley and Mikel Lujan
    11:40-12:05 Scalable 2D K-SVD parallel algorithm on GPUs
    Lu He, Rui Liu, Tim Miskell, Yan Luo and Hengyong Yu
    12:05-12:30 Accelerating Graph Applications on Integrated GPU Platforms via Instrumentation-Driven Optimizations
    Naila Farooqui, Indrajit Roy, Yuan Chen, Vanish Talwar and Karsten Schwan
    12:30-12:55 Scalable Betweenness Centrality on Multi-GPU systems
    Massimo Bernaschi, Giancarlo Carbone and Flavio Vella

    12:55-14:00 (lunch)

    14:00-15:15 Session Resiliency and Variability
    Chair: Christian Pilato
    14:00-14:25 Area-Energy Tradeoffs of Logic Wear-Leveling for BTI-induced Aging
    Rizwan Arshad Ashraf, Navid Khoshavi, Ahmad Alzahrani, Ronald F. Demara, Saman Kiamehr and Mehdi B. Tahoori
    14:25-14:50 SIMD-Based Soft Error Detection
    Zhi Chen, Alexandru Nicolau and Alexander V. Veidenbaum
    14:50-15:15 Techniques for Modulating Error Resilience in Emerging Multi-Value Technologies
    Magnus Själander, Gustaf Borgström, Mykhailo V. Klymenko, Françoise Remacle and Stefanos Kaxiras

    15:15-15:45 (break)

    15:45-16:35 Session Scaling Graph Algorithms
    Chair: Massimo Bernaschi
    15:45-16:10 Accelerating the Mining of Influential Nodes in Complex Networks through Community Detection
    Mahantesh Halappanavar, Arun Sathanur and Apurba Nandi
    16:10-16:35 Graph Programming Interface (GPI): A Linear Algebra Programming Model for Large Scale Graph Computations
    K Ekanadham, W P Horn, Manoj Kumar, Joefon Jann, Jose Moreira, Pratap Pattnaik, Mauricio Serrano, Gabriel Tanase and Hao Yu

    16:35-17:25 Poster Flash Talks
    Chair: Miquel Moretó
    Adaptable AES Implementation with Power-Gating Support
    Subhadeep Banik, Andrey Bogdanov, Tiziana Fanni, Carlo Sau, Luigi Raffo, Francesca Palumbo and Francesco Regazzoni
    A non von Neumann Continuum Computer Architecture for Scalability Beyond Moore's Law
    Maciej Brodowicz and Thomas Sterling
    Towards Low-Power Embedded Vector Processor
    Milan Stanic, Oscar Palomar, Timothy Hayes, Ivan Ratkovic, Osman Unstal, Adrian Cristal and Mateo Valero
    A Lightweight User Tracking Method for App Providers
    Remo Manuel Frey, Runhua Xu and Alexander Ilic
    Guarantee-Aware Cost Effective Virtual Machine Placement Algorithm for the Cloud
    Long Li, Ke Liu, Binzhang Fu, Mingyu Chen and Lixin Zhang.
    Resolving Frontier Problems of Mastering Large-scale Supercomputer Complexes
    Dmitry Nikitenko, Vladimir Voevodin and Sergey Zhumatiy
    Accelerating the 3D Euler Atmospheric Solver through Heterogeneous CPU-GPU Platforms
    Jingheng Xu, Haohuan Fu, Lin Gan, Chao Yang, Wei Xue and Guangwen Yang
    An Architecture for Near-Data Processing Systems. Erik Vermij
    Christoph Hagleitner, Rik Jongerius, Leandro Fiorin, Jan van Lunteren and Koen Bertels
    First Impressions from Detailed Brain Model Simulations on a Xeon-Xeon Phi Node
    George Chatzikonstantis, Dimitrios Rodopoulos, Sofia Nomikou, Christos Strydis, Chris I. De Zeeuw and Dimitrios Soudris
    Shared Resource Aware Scheduling on Power-Constrained Tiled Many-Core Processors
    Sudhanshu Jha, Wim Heirman, Ayose Falcon, Jordi Tubella, Antonio Gonzalez and Lieven Eeckhout

    17:30-19:00 Poster Session and Cocktail Reception

Tuesday May 17th

    08:45-09:45 Keynote 2
    Chair: Hubertus Franke
    Big Data Analytics and the LHC
    Maria Girone (CERN OpenLab) (abstract/bio)

    09:55-10:45 Panel 2
    Chair: Cristina Silvano
    Power Efficiency: Where Are You?
    Panelists: Adolfy Hoisie, Marek Michalewicz, Roberto Giorgi, Tobias Gemmeke

    10:45-11:15 (break)

    11:15-12:55 Session Compiler approaches
    Chair: Carsten Trinitis
    11:15-11:40 Automated Compiler Optimization of Multiple Vector Loads/Stores
    Farhana Aleen, Vyacheslav P Zakharin, Rakesh Krishnaiyer, Garima Gupta, David Kreitzer and Chang-Sun Lin Jr
    11:40-12:05 Libra: An Automated Code Generation and Tuning Framework for Register-limited Stencils on GPUs
    Mengyao Jin, Haohuan Fu, Zihong Lv and Guangwen Yang
    12:05-12:30 Optimizing Sparse Matrix Computations Through Compiler-Assisted Programming
    Kristian Rietveld and Harry Wijshoff.
    12:30-12:55 CAOS: Combined Analysis with Online Sifting for Dynamic Compilation Systems
    Jie Fu, Guojie Jin, Longbing Zhang and Jian Wang.

    12:55-14:00 (lunch)

    Parallel Track I

    14:00-15:15 Session Emerging approaches
    Chair: Alessandro Barenghi
    14:00-14:25 Secure Key-Exchange Protocol for Implants Using Heartbeats
    Robert M. Seepers, Christos Strydis, Jos H. Weber, Zekeriya Erkin, Ioannis Sourdis and Chris I. De Zeeuw
    14:25-14:50 Automated Parsing and Interpretation of Identity Leaks
    Hendrik Graupner, David Jaeger, Feng Cheng and Christoph Meinel
    14:50-15:15 Sequential Pattern Mining with the Micron Automata Processor
    Ke Wang, Elaheh Sadredini and Kevin Skadron

    15:15-15:45 (break)

    15:45-17:25 Session Runtime approaches
    Chair: Miquel Moretó
    15:45-16:10 P-Socket: Optimizing a Communication Library for a PCIe-Based Intra-Rack Interconnect
    Liuhang Zhang, Rui Hou, Sally McKee, Jianbo Dong and Lixin Zhang
    16:10-16:35 IVM: A Task-based Shared Memory Programming Model and Runtime System to Enable Load Balancing and Uniform Access to Heterogeneous CPU-GPU Clusters
    Kittisak Sajjapongse, Ruidong Gu and Michela Becchi
    16:35-17:00 Application Characterization at Scale: Lessons learned from developing a distributed Runtime System for High Performance Computing
    Joshua Landwehr, Joshua Suetterlein, Andres Marquez, Joseph Manzano and Guang R Gao
    17:00-17:25 Towards co-designed optimizations in parallel frameworks: A MapReduce case study
    Colin Barrett, Christos Kotselidis and Mikel Lujan

    Parallel Track II

    14:00-15:20 Session Special Session 1 - Funded International Projects
    Chair: Antonino Tumeo
    14:00-14:20 (Invited Talk) InfiniCortex: Present and Future
    Marek Michalewicz
    14:20-14:40 (Invited Talk) From FLOPS to BYTES: Disruptive Change in High-Performance Computing towards the Post-Moore Era
    Satoshi Matsuoka
    14:40-15:00 (Invited Talk) CryoCMOS Hardware Technology - A Classical Infrastructure for a Scalable Quantum Computer
    Edoardo Charbon
    15:00-15:20 (Invited Talk) The ANTAREX Approach to Autotuning and Adaptivity for Energy Efficient HPC Systems
    Cristina Silvano

    15:20-15:45 (break)

    15:45-17:30 Session Special Session 2 - Funded International Projects
    Chair: Houman Homayoun
    15:45-16:05 (Invited Talk) Integrated Measurement and Modeling for Performance and Power
    Adolfy Hoisie
    16:05-16:25 (Invited Talk) Exploring Dataflow-based Thread Level Parallelism in Cyber-Physical Systems
    Roberto Giorgi
    16:25-16:45 (Invited Talk) Prototyping Real-Time Tracking Systems on Mobile Devices
    Shuvra Bhattacharyya
    16:45-17:05 (Invited Talk) PHIDIAS: Ultra-Low-Power Holistic Design for Smart Bio-signals Computing Platforms
    Tobias Gemmeke
    17:05-17:30 (Invited Talk) Secure Architectures of Future Emerging Cryptography SAFEcrypto
    Maire O'Neill

    Evening Program

    17:30-19:30 Guided walking tour of Como

    19:45 Conference Banquet

Wednesday May 18

    09:00-10:40 Session Architectural Optimizations
    Chair: Roberto Giorgi
    09:00-09:25 Boosting Performance of Directory-based Cache Coherence Protocols with Coherence Bypass at Subpage Granularity and A Novel On-chip Page Table
    Mohammadreza Soltaniyeh, Ismail Kadayif and Ozcan Ozturk
    09:25-09:50 Mitigating Sync Overhead in Single-Level Store Systems
    Yuanchao Xu
    09:50-10:15 A Consistency Mechanism for NVM-Based in-Memory File Systems
    Jin Zha, Linpeng Huang, Sheng-An Zheng, Linzhu Wu and Hao Liu
    10:15-10:40 Lock-based Synchronization for GPU Architectures
    Yunlong Xu, Lan Gao, Rui Wang, Zhongzhi Luan, Weiguo Wu and Depei Qian

    10:40-11:15 (break)

    11:15-12:55 Session Design Space Exploration
    Chair: Kristian Rietveld
    11:15-11:40 Exploring Embedded Systems Virtualization Using MIPS Virtualization Module
    Carlos Moratelli, Sergio Filho and Fabiano Hessel
    11:40-12:05 vSIP: Virtual Scheduler for Interactive Performance
    Yan Sui, Chun Yang, Ning Jia and Xu Cheng
    12:05-12:30 Conserving cooling and computing power by distributing workload in data centers
    Ruihong Lin, Yuhui Deng and Liyao Yang
    12:30-12:55 Using Colored Petri nets for GPGPU performance modeling
    Souley Madougou, Ana Lucia Varbanescu and Cees De Laat

    12:55-14:00 (lunch)

    14:00-15:15 Session Emerging Architectures
    Chair: Adolfy Hoisie
    14:00-14:25 A Novel Approach for All-to-All Routing in All-optical Hypersquare Torus Network
    Zhuang Wang, Ke Liu, Long Li, Weiyi Chen, Mingyu Chen and Lixin Zhang
    14:25-14:50 Decoding EEG and LFP Signals using Deep Learning: Heading TrueNorth
    Ewan Nurse, Benjamin Mashford, Antonio Jimeno Yepes, Isabell Kiral-Kornek, Hariklia Deligianni, Jianbin Tang, Philippa Karoly, Stefan Harrer and Dean Freestone
    14:50-15:10 (Invited Talk) A Heterogeneous Quantum Computer Architecture
    Koen Bertels