Key Dates Full Papers
Paper Submission Deadline
February 11, 2020
January 28, 2020
Author Notification
March 29, 2020
March 15, 2020
Final Papers Due
April 19, 2020
April 5, 2020
Submission
Submit your paper
here
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General Co-Chairs
Maurizio Palesi
University of Catania, IT
Gianluca Palermo
Politecnico di Milano, IT
Program Co-Chairs
Cat Graves
Hewlett Packard Labs, US
Eishi Arima
ITC University of Tokyo, JP
For more information,
visit the website at
www.computingfrontiers.org
Computing Frontiers 2020 is proud to announce the following keynote
speakers and talks this year:
- Keynote 1:
Shih-Chii Liu
Exploiting sparsity in event-driven deep neural network computing architectures
- Keynote 2:
Steve Oberlin
HPC + AI: The Future Of High Performance Computing in a Post-Moore’s Law World
Exploiting sparsity in event-driven deep neural network computing architectures
Professor Shih-Chii Liu, Institute of Neuroinformatics, University of Zurich and ETH Zurich, CH
Bio:
Shih-Chii Liu is a professor in the Faculty of Science at the University of Zurich. She co-directs the Sensors group (http://sensors.ini.uzh.ch) at the Institute of Neuroinformatics, University of Zurich and ETH Zurich. Her research focus is on the design of low-power neuromorphic asynchronous spiking auditory and vision sensors, bio-inspired computing circuits, and more recently on event-driven deep neural network processors and their use in neuromorphic artificial intelligent systems. Dr. Liu is past Chair of the IEEE CAS Sensory Systems and Neural Systems and Applications Technical Committees. She is current Chair of the IEEE Swiss CAS/ED Society and general co-chair of the 2020 IEEE Artificial Intelligence for Circuits and Systems conference.
Abstract:
A fundamental organizing principle of brain computing enabling
its amazing combination of intelligence, quick responsiveness, and low
power consumption is its use of sparse spiking activity to drive
computation. Recent progress in the development of higher-performance
event-driven deep networks, neuromorphic spike-event-based visual
(DVS/ATIS/DAVIS) and auditory (AER-EAR/DAS) sensors along with versatile
hardware such as FPGAs have stimulated have stimulated exploration of
real-time sensor processing for wearable and IoT platforms. These
systems enable "always-on" low-latency system-level response time at
lower power than equivalent conventional solutions. I will show our
recent work in constructing energy-efficient event-driven deep networks
that exploit spatial and temporal sparsity and real-world examples of
the use of these networks with these neuromorphic sensors.
HPC + AI: The Future Of High Performance Computing in a Post-Moore’s Law World
Steve Oberlin, CTO of Tesla at NVIDIA
Abstract:
Most AI researchers and industry pioneers agree that the wide
availability and low cost of highly-efficient and powerful GPUs and
accelerated computing parallel programming tools (originally developed
to benefit HPC applications) catalyzed the modern revolution in AI/deep
learning. Clearly, AI has benefited greatly from HPC. Now, AI methods,
tools, and technology are starting to be applied to HPC applications to
great effect. This talk will explore the potential of AI-driven compute
architecture optimizations such as tensor processing units and
multi-precision computing to accelerate scientific simulation, and
describe an entirely new HPC workflow that uses traditional numeric
simulation codes to generate synthetic data sets to train machine
learning algorithms, then employs the resulting AI models to predict the
computed results, often with dramatic gains in efficiency, performance,
and even accuracy. Some compelling success stories will be shared, and
the implications of this new HPC + AI workflow on HPC applications and
system architecture in a post-Moore’s Law world considered.