Sunday, May 16 |
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14:00- 19:00 |
Intel Parallel Programming Workshop co-located with CF 2010 | |
19:00- 21:00 |
Opening Reception | |
Monday, May 17 |
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08:50 | Welcome | |
Session I (Neuroscience) Session Chair: Paul H J Kelly (Imperial College) |
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09:00 | Towards Chip-on-Chip Neuroscience: Fast Mining of Neuronal Spike
Streams Using Graphics Hardware Yong Cao, Debprakash Patnaik, Sean Ponce, Jeremy Archuleta, Patrick Butler, Wu-chun Feng, Naren Ramakrishnan |
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09:25 | SpiNNaker: Effects of Traffic Locality and Causality on the
Performance of the Interconnection Network Javier Navaridas, Luis Plana, Jose Miguel-Alonso, Mikel Lujan, Steve Furber |
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09:50 | Scalable Event-Driven Native Parallel Processing: The SpiNNaker
Neuromimetic System Alexander Rast, Cameron Patterson, Xin Jin, Mukaram Khan, Steve Furber, Francesco Galluppi |
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10:15 | Coffee break | |
Session II (Operating Systems and Storage) Session Chair: Luciano Margara (University of Bologna) |
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10:35 | Operating System Support for Mitigating Software Scalability
Bottlenecks on Asymmetric Multicore Processors Juan Carlos Saez, Alexandra Fedorova, Manuel Prieto, Hugo Vegas |
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11:00 | Efficient Cache Design for Solid-State Drives Miaoqing Huang, Olivier Serres, Vikram K. Narayana, Tarek El-Ghazawi, Gregory Newby |
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11:30 | Keynote I Session Chair: Nancy M Amato (Texas A&M University) |
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Programmable Matter with Self-reconfiguring Robots Daniela Rus (MIT) |
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12:30 | Lunch | |
Session III (Concurrency and Scheduling) Session Chair: Cecilia Metra (University of Bologna) |
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14:00 | Supporting Lock-Free Composition of Concurrent Data Objects Daniel Cederman, Philippas Tsigas |
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14:25 | Collaborative Scheduling of DAG Structured Computations on Multicore
Processors Yinglong Xia, Viktor K. Prasanna |
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Session IV a (Poster presentation) Session Chair: Pedro Trancoso (University of Cyprus) |
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14:50 | Poster lightning talks, 3 min a poster, 12 posters | |
Efficient and Scalable Barrier Synchronization for Many-Core CMPs
José L. Abellán, Juan Fernández, Manuel E. Acacio |
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A communication infrastructure for a million processor machine
Andrew Brown, Steve Furber, Jeff Reeve, Peter Wilson, Mark Zwolinski, John Chad, Luis Plana, David Lester |
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A Hyperscalar Multi-core Architecture
Jih-Ching Chiu, Yu-Liang Chou |
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Augmenting Cache Partitioning with Thread-Aware Insertion/Promotion Policies to Manage Shared Caches
Xiufeng Sui, Junmin Wu, Guoliang Chen, Yixuan Tang, Xiaodong Zhu |
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Performance and Power Evaluation of an In-line Accelerator
Alejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose |
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Energy Efficient Biomolecular Simulations with FPGA-based Reconfigurable Computing
Ananth Nallamuthu, Scott Hampton, Melissa C. Smith, Sadaf R. Alam, Pratul K. Agarwal |
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Efficient Implementation of GPGPU Synchronization Primitives on CPUs
Jayanth Gummaraju, Ben Sander, Laurent Morichetti, Benedict Gaster, Lee Howes |
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Efficient pattern matching on GPUs for intrusion detection systems
Antonino Tumeo, Oreste Villa, Donatella Sciuto |
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Efficient Parallel Implementation of Multilayer Backpropagation Network on Torus-connected CMPs
X. Jin, M. Lujan, M.M. Khan, L.A. Plana, A.D. Rast, S.R. Welbourne, S.B. Furber |
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Porting existing cache-oblivious Linear Algebra HPC Modules to Larrabee Architecture
Alexander Heinecke, Carsten Trinitis, Josef Weidendorfer |
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Novel Low-Cost Aging Sensor
Martin Omana, Daniele Rossi, Nicolò Bosio, Cecilia Metra |
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A High-Speed AES Architecture Implementation
Flavius, Mircea, Lucian, Mihai |
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15:30 | Coffee break | |
Session IV b (Poster presentation) | ||
16:00 | Poster lightning talks, 3 min a poster, 13 posters | |
A Predictable Communication Assist
Ahsan Shabbir, Sander Stuijk, Akash Kumar, Bart Theelen, Bart Mesman, Henk Corporaal |
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A Predictable Communication Assist
Ahsan Shabbir, Sander Stuijk, Akash Kumar, Bart Theelen, Bart Mesman, Henk Corporaal |
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Exploitation of Nested Thread-Level Speculative Parallelism on Multi-Core Systems
Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alex Nicolau, Alex Veidenbaum, Utpal Banerjee, Constantine Polychronopoulos |
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From Volunteer to Cloud Computing: Cloud@Home
Vincenzo D. Cunsolo, Salvatore Distefano, Antonio Puliafito, Marco Scarpa |
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Design of a Cloud Naming Framework
Antonio Celesti, Massimo Villari, Antonio Puliafito |
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A Service Based Approach for the Execution of Scientific Workflows in Grids
Andrea Bosin, Nicoletta Dessì, Madusudhanan Bairappan |
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Variability-tolerant Run-time Workload Allocation for MPSoC Energy Minimization under Real-time Constraints
Francesco Paterna, Andrea Acquaviva, Alberto Caprara, Francesco Papariello, Giuseppe Desoli, Luca Benini |
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A Portable Parallel Finite Element Simulation System
Yufeng Nie, Lei Wang, Weiwei Zhang |
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Low Cost and Low Intrusive Approach to Test On-Line the Scheduler of High Performance Microprocessors
Daniele Rossi, Martin Omana, Gianluca Berghella, Cecilia Metra, Abhijit Jas, Chandra Tirumurti, Rajesh Galivanche |
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Automatic Tuning of MPI Runtime Parameter Settings by Using Machine Learning
Simone Pellegrini, Thomas Fahringer, Herbert Jordan, Hans Moritsch |
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Exposing Parallelism and Locality in a Runtime Parallel Optimization Framework
David A. Penry, Daniel J. Richins, Tyler S. Harris, David Greenland, Koy D. Rehme |
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Erbium: A Deterministic, Concurrent Intermediate Representation for Portable and Scalable Performance
Cupertino Miranda, Philippe Dumont, Albert Cohen, Marc Duranton, Antoniu Pop |
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17:30- 20:00 |
Poster Session and Reception | |
Tuesday, May 18 |
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Session V (Caches and Branches 1) Session Chair: Josef Weidendorfer (TU München) |
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09:00 | NCID: A Non-inclusive Cache, Inclusive Directory Architecture for
Flexible and Efficient Cache Hierarchies Li Zhao, Ravi Iyer, Srihari Makineni, Don Newell |
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09:25 | Global Management of Cache Hierarchies Mohamed Zahran, Sally A. McKee |
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09:50 | Where replacement algorithms fail: a thorough analysis Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras |
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10:15 | Coffee break | |
Session VI (Caches and Branches 2) Session Chair: Carsten Trinitis (TU München) |
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10:35 | Dynamic Load Balancing Through Cache Allocation Miquel Moreto, Francisco J. Cazorla, Rizos Sakellariou, Mateo Valero |
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11:00 | EXACT: Explicit Dynamic-Branch Prediction with Active Updates Muawya Al-Otoom, Elliott Forbes, Eric Rotenberg |
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11:30 | Keynote II Session Chair: Gianfranco Bilardi (Università di Padova) |
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Nature-Inspired Techniques for Self-Organization in Dynamic Networks Ozalp Babaoglu (University of Bologna) |
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12:30 | Lunch | |
Session VII (Parallel Systems) Session Chair: Thomas Gross (ETH Zurich) |
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14:00 | Hybrid Parallel Programming with MPI and Unified Parallel C James Dinan, P. Sadayappan, Pavan Balaji, Ewing Lusk, Rajeev Thakur |
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14:25 | A Heterogeneous Parallel System Running Open MPI on a Broadband
Network of Embedded Set-Top Devices Richard Neill, Alexander Shabarshin, Luca P. Carloni |
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14:50 | Variant-based Competitive Parallel Execution of Sequential Programs Oliver Trachsel, Thomas Gross |
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15:15 | Enabling a highly-scalable global address space model for petascale
computing Vinod Tipparaju, Edoardo Apra, Weikuan Yu, Jeffery Vetter |
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15:40 | Coffee break | |
Session VIII (Processor Architecture) Session Chair: Sally McKee (Chalmers University of Technology) |
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16:00 | On-chip Communication and Synchronization Mechanisms with
Cache-Integrated Network Interfaces Stamatis Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios Nikolopoulos |
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16:25 | Models for Generating Locality-Tuned Traveling Threads for a
Hierarchical Multi-level Heterogeneous Multicore Patrick A. La Fratta, Peter M. Kogge |
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16:50 | Proposition for a sequential accelerator in future general-purpose
manycore processors and the problem of migration-induced cache misses Pierre Michaud, Yiannakis Sazeides, Andre Seznec |
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Excursion | ||
17:45 | Depart for excursion | |
Wednesday, May 19 |
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Session IX (Quantum Computing) Session Chair: Steve Furber (University of Manchester) |
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09:00 | An Improved Quantum Query Algorithm for Computing AND Boolean Function Taisia Mischenko-Slatenkova, Alina Vasilieva |
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09:25 | Reversible Online BIST Using A Bidirectional BILBO Dilip Vasudevan, Jioyan Chen, Emanuel Popovici, Michel Schellekens |
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Session X (Power 1) Session Chair: Monica Alderighi (INAF) |
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09:50 | Power and Performance Optimization of Voltage/Frequency Island-Based
Networks-on-Chip Using Reconfigurable Synchronous/Bi-Synchronous FIFOs Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen |
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10:15 | Applying Statistical Machine Learning to Multicore Voltage & Frequency
Scaling Michael Moeng, Rami Melhem |
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10:40 | Coffee break | |
Session XI (Power 2) Session Chair: Roberto Gioiosa (BSC) |
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11:00 | Interval Based Models for Run-Time DVFS Orchestration in SuperScalar
Processors Georgios Keramidas, Vasilis Spiliopoulos, Stefanos Kaxiras |
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11:25 | Multiple Sleep Modes Leakage Control in Peripheral Circuits of a All
Major SRAM-Based Processor Units Houman Homayoun, Avesta Sasan, Aseem Gupta, Alex Veidenbaum, Fadi Kurdahi, Nikil Dutt |
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11:50 | Towards Greener Data Centers with Storage Class Memory: Minimizing
Idle Power Waste through Coarse-Grain Management in Fine-Grain Scale In Hwan Doh, Young Jin Kim, Jung Soo Park, Eunsam Kim, Jongmoo Choi, Donghee Lee, Sam H. Noh |
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12:30 | Lunch | |
Session XII (Fault Tolerance and Parallel Applications) Session Chair: Andreas Liehr (Universität der Bundeswehr München) |
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14:00 | Protective Redundancy Overhead Reduction Using Instruction
Vulnerability Factor Demid Borodin, B.H.H. (Ben) Juurlink |
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14:25 | Self-organization on a Swarm Computing Fabric: a new way to look at
fault tolerance Danilo Pani, Simone Secchi, Luigi Raffo |
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14:50 | Dynamic Load Management of MMOGs in Distributed Environments Herbert Jordan, Radu Prodan, Vlad Nae, Thomas Fahringer |
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15:15 | Scalable Simulation of Complex Network Routing Policies Andrew Stone, Michelle Strout, Steven DiBenedetto, Daniel Massey |
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Closing | ||
15:40 | Closing remarks | |